The present invention relates generally to a semiconductor device and method of operation, and more particularly to a technology for reducing read time of a semiconductor device including a fuse array.
A semiconductor memory device includes numerous memory cells. As fabrication technology has improved, the degree of integration of semiconductor memory devices has also increased, such that the number of memory cells has rapidly increased. If a defect occurs in one of the memory cells, there is a high probability that the corresponding semiconductor memory device will fail to perform properly. Generally, semiconductor memory devices in which defective memory cells are detected are simply discarded.
However, with improved fabrication technology of semiconductor memory devices, defects occur in only a small number of memory cells. Even though failures may only occur in a fraction of the cells of the semiconductor memory device, the entire semiconductor memory device is discarded as a defective product, so production yield is detrimentally affected. In order to solve the above-mentioned problem, the semiconductor memory device may further include normal memory cells and redundant memory cells.